The invention relates to an interconnection element for an asynchronous time-division multiplex transmission system transmitting cells which are conveyed from input lines and are destined for an output line.
In the asynchronous time-division multiplex transmission system useful information components, for example, telephone, picture or sound signals, are transmitted in blocks of a fixed length. A cell having a predetermined number of bits in a serial sequence is called a block of a fixed length. Each cell consists of a header field and an information field. The header field contains inter alia the path identification for the cell. Path identification should here be understood to mean a connection identification or a path routing identification. The connection identification comprises the data on the target or subtarget for the useful information. The path routing information is added together within the system in certain transmission systems and contains data on a subtarget within the transmission arrangement. The useful information is accommodated in the information field.
Certain time intervals (time frames) are assigned to consecutive cells. The duration of such a time interval depends on the clock frequency employed for the tansmission components. If no useful information is available, idle cells, i.e. cells without useful information, are transmitted in such idle cells. Cells containing a useful information are designated useful cells.
During the transmission of the cells between subscribers, the cells pass through switching networks in which paths for the evaluation of the path identification are made. Such a switching network may be composed of a plurality of switching network blocks. Such a switching network block having a plurality of input lines and output lines is comprised of a plurality of interconnection elements. An interconnection element includes a plurality of input lines and an output line. In an interconnection element cells are then passed from an input line to an output line. On arrival of cells from a plurality of input lines during a time frame that wish to access an output line, an added bit (activity bit) is set to zero. In the opposite case this bit is set to one. In a subsequent concentrator the number of lines is reduced from N to L lines, so that when cells containing a useful information arrive at M input lines, wherein L&lt;M&lt;=N, some cells are lost. In a network (shifter) connected to the concentrator, cells which during a time frame are coming in from the concentrator and to which a bit having the value one are added, are entered into the shifter. In the shifter the cells are shifted such, that each output of the shifter supplies cells in a uniform manner. The outputs of the shifter are always connected to a buffer. The reading procedure in a shifter having, for example, eight inputs and outputs proceeds, it being assumed that five usuful cells arrive at a first time frame and four useful cells at a second time frame, in the following manner: First, the five useful cells are applied to five outputs. At the second time frame three cells are passed to the remaining three outputs which at the preceding time frame did not supply cells, the further useful cells being applied to one of the other five outputs. The reading operation is consequently controlled such, that a uniform filling of the buffers is achieved. This is expensive for this interconnection element in that a bit (activity bit) is added to control the cells and that all the cells having a message are conveyed via the concentrator. The selection of the cells destined for the output lines is only effected by the shifter. In addition, this shifter, which is an Omega network, may be blocked. To ensure that then no cells are lost, the shifter must be provided with stores, which increases the transit time of the cells through the shifter.